It will be one of four semiconductor pilot line projects designated by the European chip consortium Chip JU. The other three are for packaging, wide bandgap devices and 2nm process technology.
Half the money comes from the Chip JU and half from participating member states.
The FD-SOI pilot line will develop five technologies:
FD-SOI process for 10nm and 7nm process nodes；
A variety of eNVM embedded non-volatile memories, including OxRAM, FeRAM, MRAM, and FeFET;
RF components such as switches, filters, capacitors, etc.
Two 3D integration processes: heterogeneous integration and sequential integration;
Small inductors for developing DC-DC converters on PMIC circuits.
These five sets of technologies will create market opportunities for low-power MCUs, MPUs, AI/ML devices, RF devices, 5G/6G chips, automotive chips and smart sensors.
